F. Y. Iskander, I., R. Z. Al-Rawi, D., N. B. Al-Tikriti, M. (2006). Design and Implementation of JPEG 2000 Image Compression using FPGA. , 10(2), 151-162.
Ienas F. Y. Iskander; Dhafer R. Z. Al-Rawi; Munther N. B. Al-Tikriti. "Design and Implementation of JPEG 2000 Image Compression using FPGA". , 10, 2, 2006, 151-162.
F. Y. Iskander, I., R. Z. Al-Rawi, D., N. B. Al-Tikriti, M. (2006). 'Design and Implementation of JPEG 2000 Image Compression using FPGA', , 10(2), pp. 151-162.
F. Y. Iskander, I., R. Z. Al-Rawi, D., N. B. Al-Tikriti, M. Design and Implementation of JPEG 2000 Image Compression using FPGA. , 2006; 10(2): 151-162.

Design and Implementation of JPEG 2000 Image Compression using FPGA

Journal of Engineering and Sustainable Development
Article 1, Volume 10, Issue 2, 2006, Pages 151-162
Authors
Ienas F. Y. Iskander; Dhafer R. Z. Al-Rawi; Munther N. B. Al-Tikriti
Abstract
This paper investigates the use of a Field Programmable Gate Array (FPGA Xilinx Virtex-II) to perform hardware implementation for low speed part of JPEG2000 to achieve a real time JPEG2000 system.In this paper multi processes modules written in the VHDL is proposed that can be used to accelerate an existing software implementation of JPEG2000
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