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DESIGN OF HAMMING CODE FOR 64 BIT SINGLE ERROR DETECTION AND CORRECTION USING VHDL | ||
| DIYALA JOURNAL OF ENGINEERING SCIENCES | ||
| Article 5, Volume 8, Issue 3, 2015, Pages 22-37 PDF (0 K) | ||
| Author | ||
| Adham Hadi Saleh | ||
| Abstract | ||
| Hamming code is an efficient error detection and correction technique which can be used to detect single and burst errors, and correct errors. In communication system information data transferred from source to destination by channel, which may be corrupted due to a noise. So to find original information we use Hamming code. In this paper, we have described how we can generate 7 redundancy bit for 64 bit information data. These redundancy bits are to be interspersed at the bit positions (n = 1, 2, 4, 8, 16, 32 and 64) of the original data bits, so to transmit 64 bit information data we need 7 redundancy bit generated by even parity check method to make 71 bit data string. At the destination receiver point, we receive 71 bit data, this receives data may be corrupted due to noise. In Hamming technique the receiver will decided if data have an error or not, so if it detected the error it will find the position of the error bit and corrects it. This paper presents the design of the transmitter and the receiver with Hamming code redundancy technique using VHDL. The Xilinx ISE 10.1 Simulator was used for simulating VHDL code for both the transmitter and receiver sides. | ||
| Keywords | ||
| Hamming code; error correction; error detection; even parity check method; Redundancy bits; VHDL language; Xilinx ISE; Simulator | ||
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