Proposal New Cache Coherence Protocol to Optimize CPU Time through Simulation Caches

Fayeq Jalil, Luma; Abdulkareem .H. Al-Rawi, Maha; Diaa Al-Nakshabandi, Abeer

doi:10.30684/etj.34.6B.20

	Proposal New Cache Coherence Protocol to Optimize CPU Time through Simulation Caches
Engineering and Technology Journal
Article 17, Volume 34, 6B, 2016, Pages 912-924 PDF (1012.18 K)
DOI: 10.30684/etj.34.6B.20
Authors
Luma Fayeq Jalil; Maha Abdulkareem .H. Al-Rawi; Abeer Diaa Al-Nakshabandi
Abstract
The cache coherence is the most important issue that rapidly affected the performance of a multicore processor as a result of increasing the number of cores on chip multiprocessors and the shared memory program that will be run on these processors. "Snoopy protocols" and "directory based protocols" are two types of protocols that are used to achieve coherence between caches. The main objective of these Protocols is to achieve consistency and validation of the data value in the caches of a multi core processor so that any reading of a memory address via any caches will returns the latest data written to that address. In this paper, a new protocol has been designed to solve a problem of a cache coherence that combines the two schemes of coherency: snooping and directory depending on the states of MESI protocol. The MESI protocol is a version of the snooping cache protocol which based on four (Modified, Exclusive, Shared, Invalid) states that a block in the cache memory can have. The proposed protocol has the same states of MESI protocol but the difference is in laying the directory inside a shared cache instead of main memory to make the processor more efficient by reducing the gap between fast CPU and slow main memory.
Keywords
Cache coherence problem; snooping protocol; Directory; Based cache Protocols; MESI; Cache Simulator; Dev; Multiprocessor; shared memory

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