M.Al-Bermani, A. (2008). IMPLEMENTATION OF MULTIRATE TECHNIQUE IN WIRLESS APPLICATION USING FPGA. , 2(1), 159-168. doi: 10.37652/juaps.2008.15476
Ali M.Al-Bermani. "IMPLEMENTATION OF MULTIRATE TECHNIQUE IN WIRLESS APPLICATION USING FPGA". , 2, 1, 2008, 159-168. doi: 10.37652/juaps.2008.15476
M.Al-Bermani, A. (2008). 'IMPLEMENTATION OF MULTIRATE TECHNIQUE IN WIRLESS APPLICATION USING FPGA', , 2(1), pp. 159-168. doi: 10.37652/juaps.2008.15476
M.Al-Bermani, A. IMPLEMENTATION OF MULTIRATE TECHNIQUE IN WIRLESS APPLICATION USING FPGA. , 2008; 2(1): 159-168. doi: 10.37652/juaps.2008.15476

IMPLEMENTATION OF MULTIRATE TECHNIQUE IN WIRLESS APPLICATION USING FPGA

Journal of University of Anbar for Pure Science
Article 16, Volume 2, Issue 1, 2008, Pages 159-168    PDF (527.86 K)
Document Type: Research Paper
DOI: 10.37652/juaps.2008.15476
Author
Ali M.Al-Bermani*
College of Information Engineering ,Al-Nahrain University / Baghdad
Abstract
:Multirate filter is one of the main parts that determining the receiveing quality in wireless communication. Wireless applications including ETSI DVB-T/H digital terrestrial television transmission and IEEE network standards such as 802.11 (“WiFi”), 802.16 (“WiMAX”) have high quality data acquisition and storage system requirements which increasingly take advantage using multirate techniques to avoid the use of expensive anti-aliasing analogue filters and to handle efficiently signal of different bandwidths which require different sampling frequencies. So, the present work deals with the design and implementation of multistage distributed arithmetic FIR filter with efficient cost of multiplication and storage requirement. Previous work concerning the implementation of filter is either using special programmable devices or DSP processors. Some of these works used the FPGA based architectures to implement filter in single stage but with high cost and complex design to implement. The designed arrangements are simulated and implemented using VHDL based software on Virtex-II FPGA chip. High signal resolution and large dynamic range are the main features achieved in the work.
Keywords
Wireless communications; OFDM; Multistage Approach; DA FIR filter; MPS; TSR; FPGA; Virtex
References
  1. Lattice Semiconductor Corporation, Techfocus Media, Inc. (2005), 'Implementation of an OFDM Wireless Transceiver using IP Cores on an FPGA'. FPGA and Programmable Logic Journal. www.fpgajournal.com.
  2. Xilinx Inc. ' Orthogonal Frequency Division Multiplexing (OFDM)', Wireless OFDM Solutions, Engineering standard and protocols (esp), www.xilinx.com.
  3. Xilinx Inc. 'FPGAs: DSP for Digital Video Technology Applications', Engineering standard and protocols (esp), www.xilinx.com.
  4. Xilinx Inc. (2002). 'Programmable Logic Design Quick Start Hand Book',http://www.xilinx.com
  5. Emmanel C. Ifeachor, Barrie W. Jervis. (1996), 'Digital Signal Processing', A practical approach.
  6. Jerry E. Purcell.' Multirate Filter Design - An Introduction', Ph.D. President Momentum Data Systems.
  7.  Xilinx, Inc. (March 9 2001),' Distributed Arithmetic FIR Filter V5.0.0', www.xilinx.com/ipcenter.
  8. HUNT Engineering. (13/08/02), 'Digital Filters - Using FPGA for FIR, IIR, CIC Filters'. http://www.hunteng.co.uk.
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