Al-Araji, Z. (2025). In-chip artificial intelligence technology for generating and self-correcting the topology of low-consumption RC filters. , 43(8), 705-715. doi: 10.30684/etj.2025.159870.1951
Zainab H. Al-Araji. "In-chip artificial intelligence technology for generating and self-correcting the topology of low-consumption RC filters". , 43, 8, 2025, 705-715. doi: 10.30684/etj.2025.159870.1951
Al-Araji, Z. (2025). 'In-chip artificial intelligence technology for generating and self-correcting the topology of low-consumption RC filters', , 43(8), pp. 705-715. doi: 10.30684/etj.2025.159870.1951
Al-Araji, Z. In-chip artificial intelligence technology for generating and self-correcting the topology of low-consumption RC filters. , 2025; 43(8): 705-715. doi: 10.30684/etj.2025.159870.1951

In-chip artificial intelligence technology for generating and self-correcting the topology of low-consumption RC filters

Engineering and Technology Journal
Volume 43, Issue 8, August 2025, Pages 705-715    PDF (1.19 M)
Document Type: Research Paper
DOI: 10.30684/etj.2025.159870.1951
Author
Zainab H. Al-Araji*
Physics Department/ College of Science for Women, University of Baghdad/Baghdad, Iraq.
Abstract
This study presents an innovative self-tuning system for first-class RC filter circuits, specially designed to achieve a target cut-off frequency of 500 kHz with unprecedented accuracy and high energy efficiency. The proposed model is based on a multivariate adaptive tuning algorithm that synchronously adjusts both the resistance (R) and the capacitance (C). The effectiveness of the model was verified through a three-level methodology that included theoretical modeling using Maxwell's equations, digital simulation using the MATLAB/Simulink environment, and practical testing with an accurate spectrometer. The results demonstrated a standard frequency accuracy of 99.9969% and a relative error of less than 0.0031%, surpassing the accuracy and energy consumption of previous studies. It also recorded a low power consumption of 785.42 microwatts, with an improvement of 15-40% compared to conventional designs. The system achieved rapid convergence in less than five iterations, three times faster than traditional algorithms, as well as superior thermal stability of ±0.001%/°C in the range of -20 to +70 °C. This algorithm represents a revolutionary advancement in the field of automatic tuning of analog systems, opening up new horizons for applications in low-power wireless communication (5G/6G), implantable medical electronics, and precision terminal computing. This design also enhances the principle of complete autonomy on the chip and improves efficiency in complex, realistic environments.

Highlights
  • Graph-VAE, Q-learning, and self-repair were integrated on-chip without external control
  • On-chip learning operated at ≈15 nJ per 100 episodes, enabling ultra-low-power IoT use
  • The Soft-Reset mechanism recovered from faults in under 30 ms, preventing Q-table drift
  • Tuning errors ranged from 45–55 Hz, consistently within ±5 Hz and better than all baselines
  • Dense on-chip ReRAM Q-tables enabled 1–2 Hz frequency bins for high-precision applications
Keywords
GenRLCirc Resistor; capacitor filter Self-healing electronics Q-learning optimization Graph-based variational autoencoder
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