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OPTIMIZED STRUCTURE OF DIGITAL PID CONTROLLER BASED ON FPGA | ||
| AL-TAQANI | ||
| Article 1, Volume 22, Issue 3, 2009, Pages 24-34 | ||
| Author | ||
| Raaed F. Hassan | ||
| Abstract | ||
| The work presented in this paper is concerned with design an optimized structure of a digital Proportional – Integral – Derivative (PID) controller to be implemented using Field Programmable Gate Array (FPGA). The analog PID controller was firstly considered to control a 3rd order plant, the optimum parameters of this controller is estimated using signal constraint block provided with Simulink. The discrete time PID controller is developed from analog counterpart using trapezoidal integration to approximate integral action and a backward difference for derivative action. From the time response point of view, simulation result shows that the discrete time controller has the same characteristics of the analog controller. The digital prototype of the discrete time PID controller was performed using Very high speed integrated circuit Hardware Description Language (VHDL) in order to implement based on FPGA. Results show the improvement of control system from the processing time and design flexibility points of view | ||
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