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FSK Transceiver for Bit Error Rate Tester Implementation | ||
| Iraqi Journal of Applied Physics | ||
| Article 1, Volume 8, Issue 4, 2012, Pages 9-16 | ||
| Author | ||
| E.H. Ibrahem | ||
| Abstract | ||
| This paper presents a scheme for Bit error rate (BER) testing in FPGAs. BER characteristic is one of the basic measures of the performance of any digital communication system. BER is evaluated using Monte-Carlo simulations which are very time-consuming. The proposed implementation has a Random number generator as data source. Then the data is modulated and demodulated, after that the data feds to the comparator which calculates the number of errors by comparing it with the transmitted bits. | ||
| Keywords | ||
| Bit error rate; software; defined radio; SFFSDR platform | ||
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