Design of Embedded Image Processing System Using FPGAs

A. Mohamed, Sara; R. Khalil, Mazen

doi:10.37652/juaps.2012.63237

	Design of Embedded Image Processing System Using FPGAs
Journal of University of Anbar for Pure Science
Article 14, Volume 6, Issue 2, 2012, Pages 45-49 PDF (428.08 K)
Document Type: Research Paper
DOI: 10.37652/juaps.2012.63237
Authors
Sara A. Mohamed^* ; Mazen R. Khalil^*
Technical college/Mosul.
Abstract
The work aims to design an image processing system to be configured on Spartan-3E FPGA. Embedded design techniques were adopted to construct a soft core processor system. Intel strata flash parallel NOR PROM is added to the system to meet the requirement of storing huge number of image samples. Suitable software driver with C language are used for purpose of erasing the flash PROM and write operations. High- pass and unsharp digital filers were used for the purpose of image processing. Matlab program is used for verifying the results.
Keywords
design; Embedded Image Processing System; FPGAs

References
[1] F. P, B. F. and Z. G. V. ( 2005). "Experiences with Soft-Core Processor Design". IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium, 4-8 April, pp 167b. [2] I. L., C. I., A. Gontean and M. C. (2010) " EDK Implemented Temperature Controller", IEEE, International Spring Seminar on Electronics Technology (ISSE), 12-16 May, pp 344 - 349 [3] Xilinx, Inc. (2007), "Processor Local Bus (PLB) v4.6 (v1.02a)", DS53. [4] Xilinx, Inc. (2006). " LMB BRAM Interface Controller (v2.10a)", DS452. [5] Xilinx, Inc. (2008)." Multi-Port Memory Controller (MPMC) (v4.00.a)". DS643 [6] Xilinx, Inc.(2010). "XPS Multi-CHannel External Memory Controller (v3.01a) ". DS575. [7] Xilinx, Inc. (2008). "XPS UART Lite (v1.00a)", DS571. [8] Xilinx, Inc.(2008) " EDK Concepts, Tools, and Techniques". XTP013 EDK 10.1. [9] Xilinx, Inc. (2004). " Xilinx Device Drivers ". Documentation. [10] Intel. (2005)." Intel Embedded Flash Memory (J3 v. D)". Datasheet. [11] E. N. (2000)." Digital Image Processing". pp 158-159, First Edition, Addison-Wesley, United States of America.
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Design of Embedded Image Processing System Using FPGAs

[1] F. P, B. F. and Z. G. V. ( 2005). "Experiences with Soft-Core Processor Design". IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium, 4-8 April, pp 167b.

[2] I. L., C. I., A. Gontean and M. C. (2010) " EDK Implemented Temperature Controller", IEEE, International Spring Seminar on Electronics Technology (ISSE), 12-16 May, pp 344 - 349

[3] Xilinx, Inc. (2007), "Processor Local Bus (PLB) v4.6 (v1.02a)", DS53.

[4] Xilinx, Inc. (2006). " LMB BRAM Interface Controller (v2.10a)", DS452.

[5] Xilinx, Inc. (2008)." Multi-Port Memory Controller (MPMC) (v4.00.a)". DS643

[6] Xilinx, Inc.(2010). "XPS Multi-CHannel External Memory Controller (v3.01a) ". DS575.

[7] Xilinx, Inc. (2008). "XPS UART Lite (v1.00a)", DS571.

[8] Xilinx, Inc.(2008) " EDK Concepts, Tools, and Techniques". XTP013 EDK 10.1.

[9] Xilinx, Inc. (2004). " Xilinx Device Drivers ". Documentation.

[10] Intel. (2005)." Intel Embedded Flash Memory (J3 v. D)". Datasheet.

[11] E. N. (2000)." Digital Image Processing". pp 158-159, First Edition, Addison-Wesley, United States of America.